221 lines
6.8 KiB
C
221 lines
6.8 KiB
C
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/* add user code begin Header */
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/**
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**************************************************************************
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* @file at32f403a_407_wk_config.c
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* @brief work bench config program
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**************************************************************************
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* Copyright (c) 2025, Artery Technology, All rights reserved.
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*
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* The software Board Support Package (BSP) that is made available to
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* download from Artery official website is the copyrighted work of Artery.
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* Artery authorizes customers to use, copy, and distribute the BSP
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* software and its related documentation for the purpose of design and
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* development in conjunction with Artery microcontrollers. Use of the
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* software is governed by this copyright notice and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
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* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
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* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
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* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
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* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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*
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**************************************************************************
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*/
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/* add user code end Header */
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#include "at32f403a_407_wk_config.h"
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/* private includes ----------------------------------------------------------*/
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/* add user code begin private includes */
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/* add user code end private includes */
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/* private typedef -----------------------------------------------------------*/
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/* add user code begin private typedef */
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/* add user code end private typedef */
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/* private define ------------------------------------------------------------*/
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/* add user code begin private define */
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/* add user code end private define */
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/* private macro -------------------------------------------------------------*/
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/* add user code begin private macro */
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/* add user code end private macro */
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/* private variables ---------------------------------------------------------*/
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/* add user code begin private variables */
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/* add user code end private variables */
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/* private function prototypes --------------------------------------------*/
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/* add user code begin function prototypes */
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/* add user code end function prototypes */
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/* private user code ---------------------------------------------------------*/
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/* add user code begin 0 */
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/* add user code end 0 */
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/**
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* @brief system clock config program
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* @note the system clock is configured as follow:
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* system clock (sclk) = hick / 12 * pll_mult
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* system clock source = HICK_VALUE
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* - hext = HEXT_VALUE
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* - sclk = 240000000
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* - ahbdiv = 1
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* - ahbclk = 240000000
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* - apb1div = 2
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* - apb1clk = 120000000
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* - apb2div = 2
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* - apb2clk = 120000000
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* - pll_mult = 60
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* - pll_range = GT72MHZ (greater than 72 mhz)
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* @param none
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* @retval none
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*/
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void wk_system_clock_config(void)
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{
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/* reset crm */
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crm_reset();
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/* enable lick */
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crm_clock_source_enable(CRM_CLOCK_SOURCE_LICK, TRUE);
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/* wait till lick is ready */
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while(crm_flag_get(CRM_LICK_STABLE_FLAG) != SET)
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{
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}
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/* enable hext */
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crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
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/* wait till hext is ready */
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while(crm_hext_stable_wait() == ERROR)
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{
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}
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/* enable hick */
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crm_clock_source_enable(CRM_CLOCK_SOURCE_HICK, TRUE);
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/* wait till hick is ready */
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while(crm_flag_get(CRM_HICK_STABLE_FLAG) != SET)
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{
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}
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/* config pll clock resource */
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crm_pll_config(CRM_PLL_SOURCE_HICK, CRM_PLL_MULT_60, CRM_PLL_OUTPUT_RANGE_GT72MHZ);
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/* enable pll */
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crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
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/* wait till pll is ready */
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while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
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{
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}
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/* config ahbclk */
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crm_ahb_div_set(CRM_AHB_DIV_1);
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/* config apb2clk, the maximum frequency of APB2 clock is 120 MHz */
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crm_apb2_div_set(CRM_APB2_DIV_2);
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/* config apb1clk, the maximum frequency of APB1 clock is 120 MHz */
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crm_apb1_div_set(CRM_APB1_DIV_2);
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/* enable auto step mode */
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crm_auto_step_mode_enable(TRUE);
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/* select pll as system clock source */
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crm_sysclk_switch(CRM_SCLK_PLL);
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/* wait till pll is used as system clock source */
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while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
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{
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}
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/* disable auto step mode */
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crm_auto_step_mode_enable(FALSE);
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/* update system_core_clock global variable */
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system_core_clock_update();
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}
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/**
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* @brief config periph clock
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* @param none
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* @retval none
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*/
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void wk_periph_clock_config(void)
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{
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/* enable emac periph clock */
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crm_periph_clock_enable(CRM_EMAC_PERIPH_CLOCK, TRUE);
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/* enable emactx periph clock */
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crm_periph_clock_enable(CRM_EMACTX_PERIPH_CLOCK, TRUE);
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/* enable emacrx periph clock */
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crm_periph_clock_enable(CRM_EMACRX_PERIPH_CLOCK, TRUE);
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/* enable emacptp periph clock */
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crm_periph_clock_enable(CRM_EMACPTP_PERIPH_CLOCK, TRUE);
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/* enable iomux periph clock */
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crm_periph_clock_enable(CRM_IOMUX_PERIPH_CLOCK, TRUE);
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/* enable gpioa periph clock */
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crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
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/* enable gpiob periph clock */
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crm_periph_clock_enable(CRM_GPIOB_PERIPH_CLOCK, TRUE);
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/* enable gpioc periph clock */
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crm_periph_clock_enable(CRM_GPIOC_PERIPH_CLOCK, TRUE);
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/* enable gpiod periph clock */
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crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
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/* enable uart7 periph clock */
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crm_periph_clock_enable(CRM_UART7_PERIPH_CLOCK, TRUE);
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/* enable tmr13 periph clock */
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crm_periph_clock_enable(CRM_TMR13_PERIPH_CLOCK, TRUE);
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/* enable uart5 periph clock */
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crm_periph_clock_enable(CRM_UART5_PERIPH_CLOCK, TRUE);
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/* enable can1 periph clock */
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crm_periph_clock_enable(CRM_CAN1_PERIPH_CLOCK, TRUE);
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/* enable can2 periph clock */
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crm_periph_clock_enable(CRM_CAN2_PERIPH_CLOCK, TRUE);
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}
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/**
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* @brief nvic config
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* @param none
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* @retval none
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*/
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void wk_nvic_config(void)
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{
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nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
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NVIC_SetPriority(MemoryManagement_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0));
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NVIC_SetPriority(BusFault_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0));
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NVIC_SetPriority(UsageFault_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0));
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NVIC_SetPriority(SVCall_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0));
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NVIC_SetPriority(DebugMonitor_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0));
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NVIC_SetPriority(PendSV_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 15, 0));
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NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 15, 0));
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nvic_irq_enable(EMAC_IRQn, 5, 0);
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}
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/* add user code begin 1 */
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/* add user code end 1 */
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